Fruitful Silicon Proven IP Library
The reliance of SoC design teams on proven IPs has never been greater. The process of IP selection and acquisition tends to be lengthy and can impact the overall project duration. Brite has tackled this problem head on and has built a prolific library of commonly used IPs (e.g. USB 2.0 PHY, DDR2/3/4/LPDDR2/3/4 Total Solution, DLL, 24-bit ADC, and high-speed SerDes I/O) that are silicon proven. Brite’s customers are able to access these cores readily. This can reduce the overall project cost and certainly the risk in their projects.
Brite is also authorized to use complete SMIC IP library. This library includes dozens of IP categories, including STD I/Os, Memories, PLLs, ADCs, LVDS transceivers among others. Brite in collaboration with SMIC’s design team is also able to customize certain IPs to make them better suited for the specific needs of the customers.
Brite's OEM IP agreement with Synopsys makes their IP library much more accessible to Brite’s customers. A similar, IP OEM agreement with ARM has enabled Brite to do secondary development on Cortex series A and M for its customers. Moreover, Brite is also authorized to use plentiful IP library from Cadence. This can substantially improve the IP acquisition cycle for Brite’s customers.
In 2014, Brite has reached a strategic agreement with CEVA, the world-class embedded DSP IP provider. CEVA agreed Brite to use all DSP core IP for Brite’s customers. In the meantime, Brite has been developing CEVA’s DSP hard core in SMIC process. This not only pushes the envelope of DSP performance of CEVA, but it lowers the barrier for customers selecting SMIC process with CEVA DSP.
Strategic IP Partner