Shanghai, China—March 1, 2018--Brite Semiconductor (“Brite”), a world-leading ASIC design service and DDR controller/PHY IP provider headquartered in Shanghai, China, today announced the availability of the second generation of DDR Low Power (LP) PHY IP based on SMIC 40LL process, with a 20% reduction in area, 37% in power consumption and 50% in physical implementation cycle, compared to the first generation.
The second generation of DDR Low Power PHY adopts dual row IO structure and many other logical and physical optimization means, which results in reducing the area of delay chains by 20%, decreasing the delay variations of DQ and DQS, and eliminating the balance of wire loadings and buffers among DQ and DQS. These directly lead to the increase of the utilization of silicon area and the DDR speed, and the decrease of the power consumption.
The second generation of DDR LP PHY IP has the following characteristics:
n Based on SMIC 40LL Process
n Achieve 1333Mbps in DDR3/3L/3U/LPDDR3 and 1066Mbps in DDR2/LPDDR2
n Support PHY evaluation training or software training mode
n Support RD DQS falling edge training mode
n Support AHB/APB3.0 registers interface
“Brite Semiconductor has 10-year successful experience of ASIC design service and the rich accumulation in complete DDR IP solution. There are more than 20 projects which adopted Brite’s DDR IP technology and taped out successfully on SMIC’s 28HKMG, 40LL, 55LL and 130nm processes, covering the applications of DTV, AP, navigation and NVDIMM,” said John Zhuang, Chief Technology Officer at Brite Semiconductor. “We will continue to carry out the structure innovation and improve the quality of service and the implementation process so as to provide more competitive solutions for our valuable customers.”
About Brite Semiconductor
Brite Semiconductor is a world-leading ASIC design solution provider and DDR controller/PHY provider, targeting at ULSI ASIC/SoC chip design on SMIC advanced 55nm/40nm/28nm process technology and turn-Key solutions. Brite Semiconductor provides flexible one-stop services from RTL/netlist to chip delivery, and seamless, cost effective, and low-risk solutions to customers.
Brite Semiconductor was founded in 2008 by venture capital firms from China and abroad, and collaborated with Semiconductor Manufacturing International Corporation (SMIC) as strategic partners in 2010. Headquarter in Shanghai, Brite has two subsidiaries, Beijing Brite IP and Hefei Brite Technology, and has set up offices in US, Europe, Japan and Taiwan to provide services to customers.
For more information, please visit www.britesemi.com