PHY Feature:

  • ONFI 1/2/3/4 compliant

  • SLC/MLC/TLC support

  • SDR (Asynchronous) mode 0 to 5

  • NV-DDR (Source Synchronous) mode 0 to 5

  • NV-DDR2 mode 0 to 10

  • NV-DDR3 mode 0 to 10

  • Toggle/Toggle2 mode

  • Maximum 1200Mbps (PHY_CLK = 600Mhz)

  • X8/X16 support

  • 1.2V/1.8V/3.3V support

  • All-Digital-DLL

  • APB register interface (Asynchronous to PHY_CLK)

  • SMIC 14SFP, 40LL, 55LL